Power converting device

ABSTRACT

A power converting device includes a totem pole type power factor improving circuit that includes a coil connected to a first terminal of an AC power supply, a first half-wave switch in which a source terminal is connected to the coil via a first current detector, a second half-wave switch in which a drain terminal is connected to the coil via a second current detector, a first diode in which a cathode is connected to a drain terminal of the first half-wave switch and an anode is connected to a second terminal of the AC power supply, a second diode in which an anode is connected to a source terminal of the second half-wave switch and a cathode is connected to the second terminal of the AC power supply, and a smoothing capacitor connected between the cathode of the first diode and the anode of the second diode.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a Continuation of application Ser. No. 17/221,955filed on Apr. 5, 2021, the entire contents of which are incorporatedherein by reference.

This application is based upon and claims the benefit of priority fromJapanese Patent Application No. 2020-131343, filed on Aug. 3, 2020, theentire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a power convertingdevice.

BACKGROUND

A power converting device converts an alternating current (AC) voltagethat can be obtained from an AC power supply into a direct current (DC)voltage and supplies power to a load. When the AC voltage of the ACpower supply is converted into the DC voltage, converting an AC currentflowing through the AC power supply into a sinusoidal shape having thesame phase as the AC voltage has the best power factor and low harmonicnoise. For example, the power converting device includes a totem poletype power factor improving circuit for converting an input current intoa sinusoidal shape.

In order to control the totem pole type power factor improving circuit,it is necessary to detect the AC current flowing according to the inputAC voltage. For example, a power converting device including a currenttransformer that detects a current is put into practical use. However,in such a configuration, a detection result of the AC current is outputas a positive or negative signal. Accordingly, the result of detecting acurrent cannot be directly used for a control IC for controlling thetotem pole type power factor improving circuit. Therefore, it isnecessary to convert the result of detecting the current into a signalwith reference to any GND, that is, to insulate, which causes a circuitto become complicated. In addition, the current transformer isexpensive, and thus the cost increases.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram for illustrating an example of a configuration of apower converting device according to an embodiment;

FIG. 2 is a diagram for illustrating an example of the operation of atotem pole PFC, according to an embodiment;

FIG. 3 is a diagram for illustrating an example of a configuration of acontrol circuit, according to an embodiment;

FIG. 4 is a diagram for illustrating an example of a configuration of areference voltage conversion circuit, according to an embodiment;

FIG. 5 is a diagram for illustrating an example of a configuration of acontrol circuit, according to an embodiment;

FIG. 6 is a diagram for illustrating an example of a configuration of afirst insulating driver and a second insulating driver, according to anembodiment;

FIG. 7 is a diagram for illustrating the control of a totem pole PFC,according to an embodiment;

FIG. 8 is a diagram for illustrating an example of another configurationof a polarity detection circuit, according to an embodiment; and

FIG. 9 is a diagram for illustrating an example of another configurationof a control circuit, according to an embodiment.

DETAILED DESCRIPTION

Embodiments provide a power converting device including a totem poletype power factor improving circuit capable of high-efficiency powerconversion with a simple and easy configuration.

In general, according to one embodiment, the power converting deviceincludes a totem pole type power factor improving circuit and a controlcircuit. The totem pole type power factor improving circuit includes acoil connected to a first terminal of an AC power supply, a firsthalf-wave switch in which a source terminal is connected to the coil viaa first current detector, a second half-wave switch in which a drainterminal is connected to the coil via a second current detector, a firstdiode in which a cathode is connected to a drain terminal of the firsthalf-wave switch and an anode is connected to a second terminal of theAC power supply, a second diode in which an anode is connected to asource terminal of the second half-wave switch and a cathode isconnected to the second terminal of the AC power supply, and a smoothingcapacitor connected between the cathode of the first diode and the anodeof the second diode. The control circuit controls a pulse width to turnon or off the first half-wave switch and the second half-wave switchbased on a total value of a result of detecting the DC voltage of thefirst current detector and a result of detecting the DC voltage of thesecond current detector.

Hereinafter, embodiments will be described with reference to thedrawings.

FIG. 1 is a diagram showing an example of a configuration of a powerconverting device 1 according to an embodiment. The power convertingdevice 1 includes a totem pole type power factor improving circuit andan insulating converter. The power converting device 1 including thetotem pole type power factor improving circuit is connected to an ACpower supply AC as an input power supply. The totem pole type powerfactor improving circuit converts an AC voltage of the AC power supplyAC (for example, 100 V) into a DC voltage of a high voltage (forexample, 400 V). The insulating converter is a so-called DC-DC converterthat switches DC voltage from the totem pole type power factor improvingcircuit at a high frequency to convert into a DC low voltage (forexample, about 24 V). The power converting device 1 outputs DC powerconverted by the insulating converter to a load circuit 2, therebyoperating the load circuit 2.

First, a configuration of the power converting device 1 will bedescribed. The power converting device 1 includes a filter circuit 11, atotem pole type power factor improving circuit (totem pole PFC) 12, anLLC resonance circuit 13, an insulated ACDC circuit 14, an AC voltagedetection circuit 14, and a control circuit 16.

The filter circuit 11 is a circuit for removing noise leaking from thepower converting device 1 to the AC power supply AC. The filter circuit11 is, for example, an EMC filter. The filter circuit 11 inputs an ACvoltage of a commercial frequency 50 Hz component from an input terminaland outputs the same from an output terminal. The filter circuit 11blocks high-frequency noise generated by the power converting device 1transmitted to the output terminal, and thus the high-frequency noise isnot transmitted to the input terminal. Also, the filter circuit 11includes a first terminal AC1 and a second terminal AC2 as outputterminals. That is, AC power is output from the first terminal AC1 andthe second terminal AC2. Also, the first terminal AC1 and the secondterminal AC2 of the filter circuit 11 are each connected to theinsulated ACDC circuit 14.

The totem pole PFC 12 converts the AC voltage that can be obtained fromthe AC power supply AC via the filter circuit 11 into a boosted DCvoltage and supplies the boosted DC voltage to the LLC resonance circuit13. The totem pole PFC 12 boosts the AC voltage to a DC voltage higherthan the peak value of the AC voltage. Accordingly, the totem pole PFC12 can control the AC current to become a sine wave. For example, thetotem pole PFC 12 boosts the AC voltage to a DC voltage of 400 [V]. As aresult, the totem pole PFC 12 can control a current even when the ACvoltage is between 90 and 256 [V]. That is, the totem pole PFC 12 canconfigure a power converter that can be commonly used worldwide.

The totem pole PFC 12 includes a first coil L1, a first half-wave switchS1, a second half-wave switch S2, a first diode D1, a second diode D2, afirst smoothing capacitor C1, a first resistance R1, and a secondresistance R2.

The first coil L1 is connected to the first terminal of the AC powersupply AC via the filter circuit 11. For example, the first coil L1 isconnected to the first terminal AC1 of the filter circuit 11.

The first half-wave switch S1 and the second half-wave switch S2 areswitch elements that are turned on or off under the control of thecontrol circuit 16. The first half-wave switch S1 and the secondhalf-wave switch S2 are configured by, for example, a wide bandgapsemiconductor, such as SiC, GaN, gallium oxide, or diamond. An elementconfigured of such a semiconductor has a higher switching speed than aMOSFET configured of silicon and has a smaller switching loss becausestray capacitance between a drain and a source is small.

The first half-wave switch S1 is turned on or off by a gate signal G1supplied from the control circuit 16. The second half-wave switch S2 isturned on or off by a gate signal G2 supplied from the control circuit16.

In the first half-wave switch S1, a source terminal is connected to thefirst coil L1 via the first resistance R1. In the second half-waveswitch S2, a drain terminal is connected to the first coil L1 via thesecond resistance R2. That is, the first resistance R1 and the secondresistance R2 are connected in series between the source terminal of thefirst half-wave switch S1 and the drain terminal of the second half-waveswitch S2. That is, in the second half-wave switch S2, the drainterminal is connected to the source terminal of the first half-waveswitch S1 via the series connection of the first resistance R1 and thesecond resistance R2.

Resistance values of the first resistance R1 and the second resistanceR2 are, for example, minimum values of about 0.01 Ω. The connectionpoint between the first resistance R1 and the second resistance R2 isreferred to as a connection point M. The connection point M is connectedto the first coil L1. Also, the connection point between the secondresistance R2 and the drain terminal of the second half-wave switch S2is referred to as a reference point GND. A potential of the referencepoint GND will be described as a reference potential (potential 0 [V])of various signals in controls described below.

A connection point between the first resistance R1 and the sourceterminal of the first half-wave switch S1 is connected to the controlcircuit 16. A signal IS is supplied to the control circuit 16 from theconnection point between the first resistance R1 and the source terminalof the first half-wave switch S1. The signal IS is a signal generated atboth ends of a series combined resistance of the first resistance R1 andthe second resistance R2. That is, the signal IS is a signal indicatingthe potential of the connection point between the first resistance R1and the source terminal of the first half-wave switch S1, based on theconnection point GND between the second resistance R2 and the drainterminal of the second half-wave switch S2. That is, the signal ISindicates a total value of a result of detecting the DC voltage appliedto the first resistance R1 and a result of detecting the DC voltageapplied to the second resistance R2. That is, the control circuit 16obtains, as the signal IS, the potential of the connection point betweenthe first resistance R1 and the source terminal of the first half-waveswitch S1 with respect to GND, by setting the potential of theconnection point between the second resistance R2 and the drain terminalof the second half-wave switch S2 as GND.

When a current flows towards GND from the connection point M, thepotential of the connection point M becomes a positive value withrespect to GND. In this case, a potential difference between theconnection point M and the source terminal of the first half-wave switchS1 becomes zero. That is, the voltage of the signal IS=the voltage ofthe connection point M, and thus the signal IS becomes a positive valuewith respect to GND.

When a current flows towards the connection point M from the sourceterminal of the first half-wave switch S1, the signal IS becomes apositive voltage with respect to the connection point M. In this case, apotential difference between the connection point M and GND becomeszero. That is, the voltage of the connection point M=the voltage of GND,and thus the signal IS becomes a positive value with respect to GND.

When a current flows towards the source terminal of the first half-waveswitch S1 from the connection point M via the first resistance R1, thepotential of the connection point M becomes a negative value withrespect to the source terminal of the first half-wave switch S1. In thiscase, the potential difference between the connection point M and GNDbecomes zero. The signal IS becomes a negative value with respect toGND.

When a current flows towards the connection point M from GND, thepotential of the connection point M becomes a negative value withrespect to GND. In this case, the potential difference between theconnection point M and the source terminal of the first half-wave switchS1 becomes zero. That is, the voltage of the signal IS=the voltage ofthe connection point M, and thus the signal IS becomes a negative valuewith respect to GND.

According to such a configuration, the first resistance R1 and thesecond resistance R2 constitute a current detection circuit 17 supplyingto the control circuit 16 the signal IS indicating a value of thecurrent flowing through the first coil L1. The first resistance R1functions as a first current detector (or a first voltage detector).Also, the second resistance R2 functions as a second current detector(or a second voltage detector).

In the first diode D1, a cathode is connected to the drain terminal ofthe first half-wave switch S1 and an anode is connected to the secondterminal of the AC power supply AC via the filter circuit 11. In thesecond diode D2, an anode is connected to the source terminal of thesecond half-wave switch and a cathode is connected to the anode of thefirst diode D1. The connection point between the anode of the firstdiode D1 and the cathode of the second diode D2 is connected to thesecond terminal AC2 of the filter circuit 11.

The first smoothing capacitor C1 is connected between the cathode of thefirst diode D1 and the anode of the second diode D2. A positiveelectrode terminal of the first smoothing capacitor C1 and a negativeelectrode terminal of the first smoothing capacitor C1 constitute anoutput terminal of a high voltage DC output of the totem pole PFC 12.The positive electrode terminal and negative electrode terminal of thefirst smoothing capacitor C1 are each connected to the control circuit16. Accordingly, a signal DC1 corresponding to a potential of thepositive electrode terminal of the first smoothing capacitor C1 issupplied to the control circuit 16. Also, a signal DC2 corresponding toa potential of the negative electrode terminal of the first smoothingcapacitor C1 is supplied to the control circuit 16.

The LLC resonance circuit 13 is a DCDC conversion circuit that suppliesa DC voltage required for the load circuit 2 from a high-voltage DCvoltage supplied from the totem pole PFC 12. The LLC resonance circuit13 includes a switching element S3, a switching element S4, a switchingelement S5, a switching element S6, the second coil L2, a first windingL3, a second winding L4, a third winding L5, a second smoothingcapacitor C2, and a third smoothing capacitor C3.

The switching element S3, the switching element S4, the switchingelement S5, and the switching element S6 are switch elements that areturned on or off under the control of the control circuit 16. Theswitching element S3, the switching element S4, the switching elementS5, and the switching element S6 are, for example, silicon MOSFETs. TheLLC resonance circuit 13 uses a resonance phenomenon, and thus ahigh-frequency operation can be performed without using a high-speedelement in a circuit operation. Accordingly, unlike the totem pole PFC12, the silicon MOSFET can be used.

The switching element S3 is turned on or off by a gate signal G3supplied from the control circuit 16. The switching element S4 is turnedon or off by a gate signal G4 supplied from the control circuit 16. Theswitching element S5 is turned on or off by a gate signal G5 suppliedfrom the control circuit 16. The switching element S6 is turned on oroff by a gate signal G6 supplied from the control circuit 16.

The drain terminal of the switching element S3 is connected to oneoutput terminal of the totem pole PFC 12 (the positive electrodeterminal of the first smoothing capacitor C1). A source terminal of theswitching element S4 is connected to the other output terminal of thetotem pole PFC 12 (the negative electrode terminal of the firstsmoothing capacitor C1) and a drain terminal thereof is connected to thesource terminal of the switching element S3. Also, the second coil L2,the second smoothing capacitor C2, and the first winding L3 areconnected in series between the source terminal of the switching elementS4 and a connection point between the switching element S3 and theswitching element S4.

The first winding L3, the second winding L4, and the third winding L5configure an insulating transformer T1. The second winding L4 and thethird winding L5 are insulated from the first winding L3 and excited bya magnetic field generated in the first winding L3. The second windingL4 and the third winding L5 are connected to each other. The insulationtransformer T1 is configured such that a ratio of the numbers ofwindings (T:number of turns) (winding number ratio) between the firstwinding L3 and the second winding L4 is the same as a winding numberratio between the first winding L3 and the third winding L5. Also, theinsulation transformer T1 determines a winding number ratio L3:L4between the first winding L3 and the second winding L4 and a windingnumber ratio L3:L5 between the first winding L3 and the third winding L5depending on whether the LLC resonance circuit 13 is a circuit thatboosts a voltage or a circuit that lowers a voltage. For example, whenthe LLC resonance circuit 13 is configured as the circuit that lowers avoltage, a winding number ratio is determined so that in the windingnumber ratio L3:L4 and the winding number ratio L3:L5, the numbers ofwindings of the second winding L4 and third winding L5 on the secondaryside are smaller than the first winding L3 on the primary side, such as20T:5T.

According to such a configuration, an alternating current flows throughthe second coil L2 as the switching element S3 and the switching elementS4 are turned on or off. Also, an alternating current equivalent to thatof the second coil L2 flows through the first winding L3 of theinsulation transformer T1. Accordingly, a magnetic field that changesaccording to the alternating current is generated in the insulationtransformer T1. An induced voltage is generated in the second winding L4and the third winding L5 by a change in the magnetic field (change inmagnetic flux) generated in the insulation transformer T1. According tothe induced voltage, the alternating current flows in the second windingL4 and the third winding L5. Specifically, a positive half-wave portionof the alternating current flows through the second winding L4, and anegative half-wave portion of the alternating current flows through thethird winding L5. That is, half-wave antiphase currents flow through thesecond winding L4 and the third winding L5, respectively. The half-waveantiphase currents are rectified by the switching element S5 and theswitching element S6 for synchronous rectification and are charged inthe third smoothing capacitor C3 as a positive current.

The source terminal of the switching element S5 is connected to thesecond winding L4 and the drain terminal thereof is connected to thepositive electrode terminal of the third smoothing capacitor C3. Thesource terminal of the switching element S6 is connected to the thirdwinding L5 and the drain terminal thereof is connected to the positiveelectrode terminal of the third smoothing capacitor C3. The negativeelectrode terminal of the third smoothing capacitor C3 is connected tothe connection point between the second winding L4 and the third windingL5. The load circuit 2 is connected to the third smoothing capacitor C3in parallel.

According to such a configuration, the switching element S5 functions asa body diode flowing a current from the second winding L4 to thepositive electrode terminal of the third smoothing capacitor C3. Also,the switching element S6 functions as a body diode flowing a currentfrom the third winding L5 to the positive electrode terminal of thethird smoothing capacitor C3.

According to such a configuration, the current flows through the bodydiodes of the switching element S5 and switching element S6 even if theswitching element S5 and the switching element S6 are in off states. Asa result, the current flows through the second winding L4 and the thirdwinding L5 at a timing when the alternating current flows through thefirst winding L3. The current that passed through the body diodes of theswitching element S5 and switching element S6 is charged in the thirdsmoothing capacitor C3.

Accordingly, DC power is supplied to the load circuit 2 connected to thethird smoothing capacitor C3.

In this example, the current flows through the body diodes of theswitching element S5 and switching element S6, and thus there is aforward voltage difference of about 1 [V]. For example, if a current of10 [A] flows, loss=forward voltage×current=10 [W].

On the other hand, if on-resistance, when the switching element S5 andthe switching element S6 are each conducting, is 0.01 [Ω], loss=squareof the current×resistance=10×10×0.01=1 W. Therefore, the control circuit16 may be configured to turn on the switching element S5 and theswitching element S6 according to the gate signals G5 and G6 at a timingwhen the current flows through the body diode of each of the switchingelement S5 and the switching element S6. As a result, it is possible toreduce a conduction loss and configure a power converter with goodefficiency.

The insulated ACDC circuit 14 generates a DC voltage VCC insulated fromthe AC power supply AC, based on an AC voltage of the AC power supplyAC. The DC voltage VCC is a minute (several watts) power supply foroperating the control circuit 16. The insulated ACDC circuit 14 isconnected to the first terminal AC1 and second terminal AC2 of thefilter circuit 11. The insulated ACDC circuit 14 receives a part of theAC voltage supplied from the first terminal AC1 and second terminal AC2of the filter circuit 11 and uses a voltage required for the operationof the control circuit 16 to generate the DC voltage VCC.

The AC voltage detection circuit 15 detects the AC voltage of the ACpower supply AC and supplies a detection result to the control circuit16. The AC voltage detection circuit 15 is connected to the firstterminal AC1 and second terminal AC2 of the filter circuit 11. That is,the AC voltage detection circuit 15 detects a signal ACV (alternatingcurrent voltage) indicating the voltage of the AC power supply AC, basedon the potential of the first terminal AC1 of the filter circuit 11 andthe potential of the second terminal AC2 of the filter circuit 11, andsupplies the signal ACV to the control circuit 16. The AC voltagedetection circuit 15 may be configured to supply the signal ACV as ananalog value to the control circuit 16 or configured to supply thesignal ACV of a digital value to the control circuit 16. Hereinafter,the potential of the first terminal AC1 of the filter circuit 11 issimply referred to as AC1 and the potential of the second terminal AC2of the filter circuit 11 is simply referred to as AC2.

The control circuit 16 controls switching elements of the totem pole PFC12 and LLC resonance circuit 13. The control circuit 16 is configuredby, for example, an arithmetic IC, such as a microcomputer or a digitalsignal processor. The control circuit 16 receives the DC voltage VCC foroperation from the insulated ACDC circuit 14. Also, the control circuit16 receives the signal ACV from the AC voltage detection circuit 15. Thecontrol circuit 16 receives the signal IS from the current detectioncircuit 17. As described above, the signal IS is a signal indicating thepotential of the connection point between the first resistance R1 andthe source terminal of the first half-wave switch S1 with reference tothe connection point GND between the second resistance R2 and the drainterminal of the second half-wave switch S2. The control circuit 16receives the signal DC1 and the signal DC2 from an output terminal ofthe totem pole PFC 12.

The control circuit 16 generates the gate signal G1 and the gate signalG2 for turning on or off the first half-wave switch S1 and the secondhalf-wave switch S2, based on the signal ACV, the signal IS, the signalDC1, and the signal DC2, and inputs the gate signal G1 and the gatesignal G2 to the totem pole PFC 12. Accordingly, the control circuit 16controls pulse widths of the gate signal G1 and gate signal G2 such thatthe current flowing through the first coil L1 becomes a sine wave havingthe same phase as the phase of the input AC voltage.

Also, the control circuit 16 generates the gate signals G3 to G6 forturning on or off the switching element S3, the switching element S4,the switching element S5, and the switching element S6, based on theoutput voltage of the LLC resonance circuit 13, and inputs the gatesignals G3 to G6 to the LLC resonance circuit 13.

Next, the operation of the totem pole PFC 12 will be described.

As described above, the totem pole PFC 12 operates based on the gatesignal G1 and the gate signal G2 from the control circuit 16. Forexample, the totem pole PFC 12 operates while switching among fourstates shown in FIG. 2 .

A first state is a state in which AC1>AC2 (AC1 is positive with respectto AC2), and the first half-wave switch S1 is turned off by the gatesignal G1 (the gate signal G1 is turned off) while the second half-waveswitch S2 is turned on by the gate signal G2 (the gate signal G2 isturned on). In this case, as shown in FIG. 2 , a current flows in theorder of the first terminal AC1, the first coil L1, the secondresistance R2, the second half-wave switch S2, the second diode D2, thefirst resistance R1, and the second terminal AC2. At this time, thevoltage of the first resistance R1 is 0 and the voltage of the secondresistance R2 is positive. That is, the potential of the secondresistance R2 is positive with respect to the reference point GND. Also,the potential of the first resistance R1 can be considered to be almostthe same as the potential of the second resistance R2, and thus ispositive with respect to the reference point GND. In this case, thesignal IS is positive.

A second state is a state in which AC1>AC2 (AC1 is positive with respectto AC2), and the first half-wave switch S1 is turned off by the gatesignal G1 (the gate signal G1 is turned off) and the second half-waveswitch S2 is turned off by the gate signal G2 (the gate signal G2 isturned off). In this case, the first half-wave switch S1 functions as abody diode from the source terminal towards the drain terminal.Accordingly, as shown in FIG. 2 , a current flows in the order of thefirst terminal AC1, the first coil L1, the first resistance R1, thefirst half-wave switch S1, the first smoothing capacitor C1, the seconddiode D2, and the second terminal AC2. At this time, the voltage of thesecond resistance R2 is 0 and the voltage of the first resistance R1 isnegative. That is, the potential of the first resistance R1 is negativewith respect to the reference point GND. In this case, the signal IS isnegative.

The totem pole PFC 12 maintains the first half-wave switch S1 in an offstate while AC1>AC2 (AC1 is positive with respect to AC2), andrepeatedly turns on and off the second half-wave switch S2 at a highfrequency, according to the gate signal G2. Accordingly, the totem polePFC 12 repeatedly switches between the first state and the second statewhile AC1>AC2 (AC1 is positive with respect to AC2).

A third state is a state in which AC1<AC2 (AC1 is negative with respectto AC2), and the first half-wave switch S1 is turned on by the gatesignal G1 (the gate signal G1 is turned on) while the second half-waveswitch S2 is turned off by the gate signal G2 (the gate signal G2 isturned off). In this case, as shown in FIG. 2 , a current flows in theorder of the second terminal AC2, the first diode D1, the firsthalf-wave switch S1, the first resistance R1, the first coil L1, and thefirst terminal AC1. At this time, the voltage of the second resistanceR2 is 0 and the voltage of the first resistance R1 is positive. That is,the potential of the first resistance R1 is positive with respect to thereference point GND. In this case, the signal IS is positive.

A fourth state is a state in which AC1<AC2 (AC1 is negative with respectto AC2), and the first half-wave switch S1 is turned off by the gatesignal G1 (the gate signal G1 is turned off) and the second half-waveswitch S2 is turned off by the gate signal G2 (the gate signal G2 isturned off). In this case, the second half-wave switch S2 functions as abody diode from the source terminal towards the drain terminal.Accordingly, as shown in FIG. 2 , a current flows in the order of thesecond terminal AC2, the first diode D1, the first smoothing capacitorC1, the second half-wave switch S2, the second resistance R2, the firstcoil L1, and the first terminal AC1. At this time, the voltage of thefirst resistance R1 is 0 and the voltage of the second resistance R2 isnegative. That is, the potential of the second resistance R2 is negativewith respect to the reference point GND. In this case, the signal IS isnegative.

The totem pole PFC 12 maintains the second half-wave switch S2 in an offstate while AC1<AC2 (AC1 is negative with respect to AC2), andrepeatedly turns on and off the first half-wave switch S1 at a highfrequency, according to the gate signal G1. Accordingly, the totem polePFC 12 repeatedly switches between the third state and the fourth statewhile AC1<AC2 (AC1 is negative with respect to AC2).

The control circuit 16 turns on or off the second half-wave switch S2when AC1>AC2 (AC1 is positive with respect to AC2). Accordingly, thecontrol circuit 16 controls the current flowing through the first coilL1 to be a sinusoidal current having the same shape as the AC voltageACV of the AC power supply AC while AC1 is positive with respect to AC2.Also, the control circuit 16 turns on or off the first half-wave switchS1 when AC1<AC2 (AC1 is negative with respect to AC2). Accordingly, thecontrol circuit 16 controls the current flowing through the first coilL1 to be a sinusoidal current having the same shape as the AC voltageACV of the AC power supply AC while AC1 is negative with respect to AC2.As a result, the generation of current harmonic noise can be suppressed.

Next, an example of a detailed configuration of the control circuit 16will be described.

FIG. 3 is a diagram for illustrating an example of a configuration ofthe control circuit 16.

The control circuit 16 includes a reference voltage conversion circuit21, a PFC control circuit 22, a first insulating driver 23, and a secondinsulating driver 24.

The reference voltage conversion circuit 21 outputs an output voltage ofthe totem pole PFC 12 and a signal VFB indicating a voltage based onGND. In the totem pole PFC 12, AC2, and DC2 have the same potentialwhile AC1>AC2. Also, in the totem pole PFC 12, AC1 and DC1 have the samepotential while AC1<AC2. As such, a reference voltage of an output ofthe totem pole PFC 12 fluctuates. Thus, the reference voltage conversioncircuit 21 converts the signal DC1 and the signal DC2 received from theoutput terminal of the totem pole PFC 12 into the signal VFB indicatingthe voltage based on GND.

FIG. 4 is a diagram for illustrating an example of a configuration ofthe reference voltage conversion circuit 21. The reference voltageconversion circuit 21 includes a plurality of resistances and anoperational amplifier. The reference voltage conversion circuit 21resist-divides the potential of each of the signal DC1 and signal DC2based on GND and inputs the divided signals DCD1 and DCD2 to twoterminals of the operational amplifier. In this case, the resistancevalue of the resistance is determined such that the divided voltagevalue does not exceed the DC voltage VCC. That is, the signal DCD1 andthe signal DCD2 appear as potentials between GND and VCC. Theoperational amplifier outputs a difference between the signal DCD1 andthe signal DCD2 as the signal VFB.

The reference voltage conversion circuit 21 may be configured to outputthe signal VFB by another method. For example, the reference voltageconversion circuit 21 converts the potential difference of the signalDC1 and the signal DC2 into a pulse width and inputs the pulse to aphotocoupler or the like. Accordingly, a GND-based pulse conductioncurrent is generated. A voltage corresponding to the pulse width isregenerated based on GND. As a result, the potential difference ofanother portion of potential may be converted into a GND-based signal.

FIG. 5 is a diagram for illustrating an example of a configuration ofthe PFC control circuit 22. The PFC control circuit 22 outputs a signalG1G and a signal G2G used to control the first half-wave switch S1 andthe second half-wave switch S2 of the totem pole PFC 12, based on thesignal VFB, the signal ACV, and the signal IS. The signals G1G and G2Gare signals for controlling the first half-wave switch S1 and secondhalf-wave switch S2, based on the potential of the reference point GND.

The PFC control circuit 22 includes a low-pass filter 31, a firstcomparator 32, a polarity detection circuit 33, a voltage detectioncircuit 34, an absolute value conversion circuit 35, a multiplier 36, acurrent determiner 37, a second comparator 38, a PWM converter 39, and aselector 40.

The signal VFB is input to the low-pass filter 31. The low-pass filter31 cuts a high-frequency component of the input signal VFB and inputsthe same to the first comparator 32. The low-pass filter 31 is set tohave, for example, a frequency lower than a frequency of 50 Hz of the ACpower supply. For example, the low-pass filter 31 is set to transmit afrequency component lower than 20 Hz. That is, the low-pass filter 31 isconfigured to cut a frequency component higher than 20 Hz. According tosuch a configuration, the low-pass filter 31 can cancel a 100 Hz (fullwave of 50 Hz) component generated in the first smoothing capacitor C1and output an average value of a voltage of the first smoothingcapacitor C1.

An output of the low-pass filter 31 and a reference voltage are input tothe first comparator 32. The first comparator 32 outputs, to themultiplier 36, a result of comparing the output of the low-pass filter31 and the reference voltage. That is, the first comparator 32 outputs asignal VDIF that is a result of comparing a low-frequency component ofthe signal VFB and the reference voltage. Specifically, the firstcomparator 32 subtracts the reference voltage from the low-frequencycomponent of the signal VFB and outputs the result thereof as the signalVDIF. That is, the signal VDIF indicates a displacement of the signalVFB with respect to the reference voltage.

Any value is set for the reference voltage. The reference voltage is setto, for example, 400 V. It is possible to support any AC voltageworldwide by setting the reference voltage to 400 V. The highest ACvoltage worldwide is 264 V, and thus a peak value thereof is 372 V thatis 1.41 times 264 V. By setting a voltage higher than 372 V as thereference voltage, the reference voltage is power conversion that can beused universally.

The polarity detection circuit 33 detects the polarity of an AC voltagesupplied from the AC power supply AC, based on the signal ACV, andoutputs a result of the detection as a signal ACP. The polaritydetection circuit 33 outputs the signal ACP to the current determiner 37and the selector 40. The polarity detection circuit 33 outputs, as thesignal ACP, a logical value of any one of “0” and “1” based on whetherthe value of the signal ACV is positive or negative. For example, thesignal ACV is assumed to have a configuration indicating the potentialof the first terminal AC1 with respect to the second terminal AC2 of thefilter circuit 11. In this case, the polarity detection circuit 33outputs the signal ACP of “1” when the signal ACV is positive andoutputs the signal ACP of “0” when the signal ACV is negative. That is,the polarity detection circuit 33 outputs the signal ACP of “1” when thepotential of the first terminal AC1>the potential of the second terminalAC2, and outputs the signal ACP of “0” when the potential of the firstterminal AC1<the potential of the second terminal AC2.

The voltage detection circuit 34 converts the signal ACV into a signalof a voltage having any width and outputs the same to the absolute valueconversion circuit 35. The signal ACV input to the voltage detectioncircuit 34 has an instantaneous value of −141 to 141 V when the AC powersupply AC is an AC power supply having an effective value of 100 V. Thevoltage detection circuit 34 converts the instantaneous value of the ACvoltage of the AC power supply AC, indicated by the signal ACV, into avalue within a pre-set range. That is, the voltage detection circuit 34normalizes the instantaneous value of the AC voltage of the AC powersupply AC, indicated by the signal ACV. Specifically, the voltagedetection circuit 34 converts the instantaneous value of the AC voltageof the AC power supply AC, indicated by the signal ACV, into aninstantaneous value in a range of −1 to 1. It becomes possible todetermine a phase in a waveform of a sine wave state, based on thesignal ACV converted by the voltage detection circuit 34. That is, thesignal ACV normalized by the voltage detection circuit 34 can berephrased as sine wave phase information indicating a phase in a sinewave.

The absolute value conversion circuit 35 converts the signal ACV outputfrom the voltage detection circuit 34 into a signal ABS that is a signalof an absolute value, and outputs the signal ABS to the multiplier 36.The absolute value conversion circuit 35 converts the signal ACV outputfrom the voltage detection circuit 34 into a signal of a value of 0 to 1(a signal in a full-wave rectified state) by converting the signal ACVinto an absolute value.

The multiplier 36 multiplies the signal VDIF supplied from the firstcomparator 32 and the signal ABS supplied from the absolute valueconversion circuit 35. The multiplier 36 outputs, as a signal AIM, theresult of multiplying the signal VDIF and the signal ABS to the secondcomparator 38. The signal AIM indicates a target current value.

The signal ACP, the signal IS, the signal G1G, and the signal G2G areinput to the current determiner 37. The current determiner 37 detectsthe signal IS when the signal G1G or the signal G2G is emitting a pulse.Specifically, the current determiner 37 obtains an extraction signal ISEby performing an extraction process to extract a signal from the inputsignal IS while the signal G1G is on or the signal G2G is on. Theextraction signal ISE is a value of the signal IS when the signal G1G ison or when the signal G2G is on. That is, the extraction signal ISE is apositive value with reference to the GND voltage of the signal IS.Accordingly, the extraction signal ISE has a discrete waveform. That is,there is timing when there is no value in the extraction signal ISE.

The current determiner 37 obtains an interpolation signal ISI having acontinuous waveform by performing interpolation based on the extractionsignal ISE. That is, the current determiner 37 calculates theinterpolation signal ISI by interpolating the timing when there is novalue of the extraction signal ISE. That is, the current determiner 37calculates a value of the timing when there is no value in theextraction signal ISE by performing linear interpolation or anymathematical approximation based on the values of the past extractionsignals ISE. As a result, the interpolation signal ISI becomes a signalthat approximately indicates a current actually flowing through thefirst coil L1. The current determiner 37 outputs the interpolationsignal ISI to the second comparator 38.

The signal AIM and the interpolation signal ISI are input to the secondcomparator 38. The second comparator 38 outputs a signal IDIF that is aresult of comparing the signal AIM and the interpolation signal ISI tothe PWM converter 39. The signal IDIF indicates the difference betweenthe signal AIM that is a target current value and the interpolationsignal ISI approximated to a current that is actually flowing.

The PWM converter 39 generates a signal PWM that is a pulse widthmodulated signal, based on a value of the signal IDIF and outputs thesignal PWM to the selector 40. For example, when a current actuallyflowing is small with respect to the target current value, the PWMconverter 39 performs modulation of increasing the pulse width, and whenthe current actually flowing is large with respect to the target currentvalue, the PWM converter 39 performs modulation of decreasing the pulsewidth.

The signal ACP and the signal PWM are input to the selector 40. Theselector 40 determines, based on the signal ACP, whether to output thesignal PWM as the signal G1G to the first insulating driver 23 and thecurrent determiner 37 or output the signal PWM as the signal G2G to thesecond insulating driver 24 and the current determiner 37. Specifically,when the signal ACP is “1”, the selector 40 outputs the signal PWM asthe signal G2G to the second insulating driver 24 and the currentdeterminer 37. Alternatively, when the signal ACP is “0”, the selector40 outputs the signal PWM as the signal G1G to the first insulatingdriver 23 and the current determiner 37. The signal PWM, i.e., thesignal G1G and the signal G2G, is a GND-based signal. Of the firstinsulating driver 23 and the second insulating driver 24, a signalsupplied to one to which the signal PWM is not output becomes “0 (stopsignal)”.

The first insulating driver 23 and the second insulating driver 24insulate a signal input to a primary side and outputs the same from asecondary side.

FIG. 6 is a diagram for illustrating an example of configurations of thefirst insulating driver 23 and the second insulating driver 24. Thefirst insulating driver 23 and the second insulating driver 24 eachinclude, for example, a pulse transformer 41. The pulse transformer 41includes a winding on the primary side, a winding on the secondary side,and a magnetic core.

As shown in FIG. 6 , GND-based G1G and GND are connected to the windingon the primary side of the pulse transformer 41 of the first insulatingdriver 23, and G1GND-based G1 is connected to the winding on thesecondary side of the pulse transformer 41. Specifically, GND and theselector 40 of the totem pole PFC 12 are connected to the winding on theprimary side of the pulse transformer 41. Also, the gate terminal of thefirst half-wave switch S1 and the source terminal of the first half-waveswitch S1 are connected to the winding on the secondary side of thepulse transformer 41.

According to the above configuration, the signal G1G that is a GND-basedpulse form signal output from the totem pole PFC 12 is input to thewinding on the primary side of the pulse transformer 41 of the firstinsulating driver 23. When the GND-based signal G1G is input to thewinding on the primary side of the pulse transformer 41, an inducedvoltage is generated in the winding on the secondary side of the pulsetransformer 41. According to the induced voltage, the signal G1 that isa pulse form signal corresponding to the signal G1G and based onpotential G1GND of the source terminal of the first half-wave switch S1is input from the winding on the secondary side of the pulse transformer41 to the gate terminal of the first half-wave switch S1. As a result,the first half-wave switch S1 is turned on or off based on the signalG1.

As shown in FIG. 6 , GND-based G2G and GND are connected to the windingon the primary side of the pulse transformer 41 of the second insulatingdriver 24, and G2GND-based G2 is connected to the winding on thesecondary side of the pulse transformer 41. Specifically, the selector40 of the totem pole PFC 12 and GND are connected to the winding on theprimary side of the pulse transformer 41. Also, the gate terminal of thesecond half-wave switch S2 and the source terminal of the secondhalf-wave switch S2 are connected to the winding on the secondary sideof the pulse transformer 41.

According to the above configuration, the signal G2G that is a GND-basedpulse form signal output from the totem pole PFC 12 is input to thewinding on the primary side of the pulse transformer 41 of the secondinsulating driver 24. When the GND-based signal G2G is input to thewinding on the primary side of the pulse transformer 41, an inducedvoltage is generated in the winding on the secondary side of the pulsetransformer 41. According to the induced voltage, the signal G2, whichis a pulse form signal corresponding to the signal G2G and based onpotential G2GND of the source terminal of the second half-wave switchS2, is input from the winding on the secondary side of the pulsetransformer 41 to the gate terminal of the second half-wave switch S2.

The first insulating driver 23 and the second insulating driver 24 mayfurther include a filter capacitor that is connected to the winding onthe primary side of the pulse transformer 41 in series and cuts a DCcomponent.

The signal G1 and the signal G2 are positive and negative signals basedon G1GND and G2GND, respectively. Accordingly, a winding number ratio ofthe coil of the pulse transformer 41 may be adjusted such that values ofthe signal G1 and signal G2 are doubled (such that the voltage is thesame as that of the primary side).

Also, the first insulating driver 23 and the second insulating driver 24may further include a filter capacitor that is connected to the coil onthe secondary side of the pulse transformer 41 in series and cuts a DCcomponent.

The first insulating driver 23 and the second insulating driver 24 maybe configured to convert the signals G1G and G2G into G1GND andG2GND-based signals G1 and G2 by a photocoupler. Since a signal outputfrom the photocoupler is weak, a buffer circuit may be further provided.

The first insulating driver 23 and the second insulating driver 24 mayboost a signal output from the photocoupler by a DC power supply forboost by a bootstrap method, and input the same to the gate terminal ofthe second half-wave switch S2. For example, when the signal G2 is on,the potential of G1GND is the same as the potential of G2GND. When theDC power supply for boost is connected to the G2GND side, the potentialof the DC power supply for boost is also supplied to G1GND through thebody diode of the second half-wave switch S2. Then, when the signal G2is off, the potential of G1GND is different from the potential of G2GND,but G1GND-based potential is preserved. The signal output from thephotocoupler may be amplified by using this potential and input to thegate terminal of the first half-wave switch S1.

FIG. 7 is a diagram for illustrating a relationship between the voltageof the AC power supply AC and the current flowing through the totem polePFC 12. In FIG. 7 , examples of the signal ACV indicating the voltage ofthe AC power supply AC, the signal ACP indicating the result of polaritydetection, the signal G1 (G1G) input to the gate terminal of the firsthalf-wave switch S1, the signal G2 (G2G) input to the gate terminal ofthe second half-wave switch S2, the voltage applied to the firstresistance R1, the voltage applied to the second resistance R2, thesignal IS, the extraction signal ISE, and the interpolation signal ISIare illustrated. In the example of FIG. 7 , the polarity is positive(AC1>AC2) between a timing t0 and a timing t1, the polarity is negative(AC1<AC2) between the timing t1 and a timing t2, and the polarity ispositive again (AC1>AC2) after the timing t2.

As described above, the polarity detection circuit 33 outputs the signalACP having a logical value “1” while AC1>AC2, and outputs the signal ACPhaving a logical value “0” while AC1<AC2.

Also, the control circuit 16 of the totem pole PFC 12 sequentiallycalculates the signal AIM indicating a target current, based on thesignal VFB indicating the output voltage of the totem pole PFC 12 andACV indicating the AC voltage.

The control circuit 16 generates the signal PWM based on the signal IDIFthat is the result of comparing the signal AIM and the interpolationsignal ISI while AC1>AC2. That is, the control circuit 16 generates thesignal PWM such that the difference between the signal AIM and theinterpolation signal ISI is small, and inputs the signal PWM as thesignal G2 to the gate terminal of the second half-wave switch S2.Accordingly, the totem pole PFC 12 turns on or off the second half-waveswitch S2 by the signal G2 while AC1>AC2. As a result, the totem polePFC 12 switches between the first state and the second state shown inFIG. 2 , according to the signal G2.

The totem pole PFC 12 controls lengths of the first state and secondstate by controlling a pulse width. Specifically, the totem pole PFC 12controls ON duty of the signal G2 corresponding to the length of thefirst state in one cycle by frequency fixation. Accordingly, at the sametime, the length of the second state is also determined by subtractingthe length of the first state from the length of one cycle. As such, thetotem pole PFC 12 can switch between the first state and the secondstate a plurality of times to bring the interpolation signal ISI and thesignal AIM that is a target waveform of the interpolation signal ISIclose to each other.

Also, the control circuit 16 generates the signal PWM based on thesignal IDIF that is a result of comparing the signal AIM and theinterpolation signal ISI while AC1<AC2. That is, the control circuit 16generates the signal PWM such that the difference between the signal AIMand the interpolation signal ISI is small, and inputs the signal PWM asthe signal G1 to the gate terminal of the first half-wave switch S1.Accordingly, the totem pole PFC 12 turns on or off the first half-waveswitch S1 by the signal G1 while AC1<AC2. As a result, the totem polePFC 12 switches between the third state and the fourth state shown inFIG. 2 , according to the signal G1.

The totem pole PFC 12 controls lengths of the third state and fourthstate by controlling the pulse width. Specifically, the totem pole PFC12 controls ON duty of the signal G1 corresponding to the length of thethird state in one cycle by frequency fixation. Accordingly, at the sametime, the length of the fourth state is also determined by subtractingthe length of the third state from the length of one cycle.

In the first state, the voltage of the first resistance R1 becomes 0 andthe voltage of the second resistance R2 becomes a positive value. In thesecond state, the voltage of the second resistance R2 becomes 0 and thevoltage of the first resistance R1 becomes a negative value. In thethird state, the voltage of the second resistance R2 becomes 0 and thevoltage of the first resistance R1 becomes a positive value. In thefourth state, the voltage of the first resistance R1 becomes 0 and thevoltage of the second resistance R2 becomes a negative value. That is,as shown in FIG. 7 , positive components of results of detecting thevoltage of the first resistance R1 that is a first current detector, andthe voltage of the second resistance R2 that is a second currentdetector become a pulsating voltage having a half-wave shape (ahalf-wave shaped pulsating voltage). The positive component of theresult of detecting the voltage of the first resistance R1, which is thefirst current detector, and the positive component of the result ofdetecting the voltage of the second resistance R2, which is the secondcurrent detector, have different phases by 180°. Since the signal IS isa signal generated at both ends of a series combined resistance of thefirst resistance R1 and the second resistance R2, as shown in FIG. 7 ,the voltage of the first resistance R1 and the voltage of the secondresistance R2 are added and combined to form a waveform (a bi-waveshaped pulsating voltage). That is, the signal IS is a signal obtainedby adding the result of detecting the voltage of the first resistance R1that is the first current detector and the result of detecting thevoltage of the second resistance R2 that is the second current detector,and has the positive component in a full-wave shaped pulsating voltage.

The extraction signal ISE is the signal IS while the signal GIG is on orthe signal G2G is on. While AC1<AC2, the signal G1G is off and the powerconverting device 1 operates by turning the signal G2G on or off. WhileAC1<AC2, the current determiner 37 obtains the signal IS while thesignal G2G is on, as the extraction signal ISE. While AC1<AC2 and thesignal G2G is on, the signal IS has a positive value. Accordingly, thecurrent determiner 37 can extract the positive value of the signal IS asthe extraction signal ISE.

Also, while AC1>AC2, the signal G2G is off and the power convertingdevice 1 operates by turning the signal G1G on or off. While AC1>AC2,the current determiner 37 obtains the signal IS while the signal G1G ison, as the extraction signal ISE. While AC1>AC2 and the signal G1G ison, the signal IS has a positive value. Accordingly, the currentdeterminer 37 can extract the positive value of the signal IS as theextraction signal ISE.

The current determiner 37 includes a configuration (circuit) forobtaining (generating) the interpolation signal ISI having a continuouswaveform by performing interpolation based on the extraction signal ISE.For example, the current determiner 37 interpolates a blank value in theextraction signal ISE by performing linear interpolation or somemathematical approximation. As a result, the current determiner 37 canoutput, as the interpolation signal ISI, a signal corresponding to thecurrent actually flowing through the first coil L1.

As described above, the power converting device 1 includes the totempole type power factor improving circuit (totem pole PFC) 12, thecurrent detection circuit 17, and the control circuit 16.

The totem pole PFC 12 includes the first coil L1 connected to the firstterminal AC1 of the AC power supply AC and the first half-wave switch S1whose source terminal is connected to the first coil L1 through thefirst resistance R1 that is the first current detector. The totem polePFC 12 includes the second half-wave switch S2 whose drain terminal isconnected to the first coil L1 through the second resistance R2 that isthe second current detector. The first resistance R1 and the secondresistance R2 configure the current detection circuit 17. The totem polePFC 12 includes the first diode D1 in which the cathode is connected tothe drain terminal of the first half-wave switch S1 and the anode isconnected to the second terminal AC2 of the AC power supply AC, and thesecond diode D2 in which the anode is connected to the source terminalof the second half-wave switch S2 and the cathode is connected to thesecond terminal AC2 of the AC power supply AC. The totem pole PFC 12includes the first smoothing capacitor C1 connected between the cathodeof the first diode D1 and the anode of the second diode D2.

The control circuit 16 controls the pulse width of turning on or off thefirst half-wave switch S1 and second half-wave switch S2, based on thesignal IS indicating a total value of the DC voltage applied to thefirst resistance R1 and the DC voltage applied to the second resistanceR2.

According to such a configuration, a value of the current flowingthrough the first coil L1 appears as a positive value of the signal IS.The control circuit 16 can control the current flowing through the firstcoil L1 in a sinusoidal shape having the same phase as the phase of thevoltage of the AC power supply AC by controlling on or off of the firsthalf-wave switch S1 and the second half-wave switch S2, based on thesignal IS. As a result, the power converting device 1 is able to performhigh-efficiency power conversion with a simple and easy configuration.

The control circuit 16 obtains the signal IS that is a total value of aresult of detecting the DC voltage of the first resistance R1 and aresult of detecting the DC voltage of the second resistance R2, based onthe GND voltage that is the voltage at the connection point between thedrain terminal of the second half-wave switch S2 and the secondresistance R2.

The control circuit 16 extracts a positive value as an extraction signalwith reference to the GND voltage from the total value and controls thepulse width of turning on or off the first half-wave switch S1 and thesecond half-wave switch S2 based on the extraction signal.

When there is no value of the extraction signal, the control circuit 16calculates an interpolation signal by performing interpolation based onthe values of past extraction signals and controls the pulse width ofturning on or off the first half-wave switch S1 and the second half-waveswitch S2 based on the interpolation signal. Accordingly, the powerconverting device 1 can perform high-efficiency power conversion at highaccuracy with a simple and easy configuration.

In the above embodiment, it is described that the second half-waveswitch S2 is turned on or off while AC1>AC2 and the first half-waveswitch S1 is turned on or off while AC1<AC2, but the embodiment is notlimited to this configuration. The control circuit 16 may be configuredto turn on the first half-wave switch S1 while AC1>AC2 and the secondhalf-wave switch S2 is turned off and to turn on the second half-waveswitch S2 while AC1<AC2 and the first half-wave switch S1 is turned off.That is, the control circuit 16 may be configured to perform synchronousrectification by the first half-wave switch S1 and the second half-waveswitch S2.

While AC1>AC2 and the second half-wave switch S2 is turned off, thefirst half-wave switch S1 functions as a body diode from the sourceterminal towards the drain terminal. Further, while AC1<AC2 and thefirst half-wave switch S1 is turned off, the second half-wave switch S2functions as a body diode from the source terminal towards the drainterminal.

However, the loss when the first half-wave switch S1 is turned on issmaller than the loss of the body diode of the first half-wave switchS1. Further, the loss when the second half-wave switch S2 is turned onis smaller than the loss of the body diode of the second half-waveswitch S2. Thus, as described above, the first half-wave switch S1 isturned on while AC1>AC2 and the second half-wave switch S2 is turnedoff, and the second half-wave switch S2 is turned on while AC1 <AC2 andthe first half-wave switch S1 is turned off, and thus, it is possible toreduce the loss of the circuit of the totem pole PFC 12.

When the synchronous rectification is performed as described above,pulses appear alternatively in the signal G1G and the signal G2G.Accordingly, the current determiner 37 of the control circuit 16 cannotextract the extraction signal ISE from the signal IS based on the signalG1G and the signal G2G. At this time, the current determiner 37determines whether to use the signal G1G or the signal G2G forextraction of the extraction signal ISE based on the signal ACP from thepolarity detection circuit 33.

Specifically, the current determiner 37 extracts the extraction signalISE from the signal IS while the first terminal AC1 of the AC powersupply AC is at a positive potential and the second half-wave switch S2is turned on. Further, the current determiner 37 extracts the extractionsignal ISE from the signal IS while the second terminal AC2 of the ACpower supply AC is at a positive potential and the first half-waveswitch S1 is turned on. Accordingly, the control circuit 16 can extractthe extraction signal ISE from the signal IS.

Similarly, the first diode D1 and the second diode D2 may each bereplaced with MOSFET. Specifically, the first diode D1 may be configuredas a body diode of FET that is turned on while AC1>AC2 and turned offwhile AC1<AC2. Also, specifically, the second diode D2 may be configuredas a body diode of FET that is turned off while AC1>AC2 and turned onwhile AC1<AC2. According to such a configuration, the loss of circuit ofthe totem pole PFC 12 can be reduced.

The first half-wave switch S1 and the second half-wave switch S2according to the above embodiment need to be configured in a widebandgap semiconductor for high-speed switching. However, since thecurrent flowing through the first diode D1 and the second diode D2 is a50 Hz component that is a frequency of the AC power supply AC, an FETincluding a silicon semiconductor having a relatively slow reaction canbe used when a synchronous rectifying FET is used instead of the firstdiode D1 and the second diode D2.

When the synchronous rectifying FET is used instead of the first diodeD1 and the second diode D2, the cathode sides of the first diode D1 andsecond diode D2 are replaced with a drain terminal of the FET, and theanode sides of the first diode D1 and second diode D2 are replaced witha source terminal of the FET.

In the above embodiment, it was described that the polarity detectioncircuit 33 has a configuration for detecting the polarity of the ACvoltage supplied from the AC power supply AC based on the signal ACV andoutputting the result of the detection as the signal ACP. The polaritydetection circuit 33 may be implemented by a combination of a processorand a memory storing a program, or by an analog circuit.

An example in which the polarity detection circuit 33 is configured asan analog circuit is shown in FIG. 8 . In the example of FIG. 8 , thepolarity detection circuit 33 is provided outside the control circuit 16and outputs the signal ACP to the selector 40 and the current determiner37 of the control circuit 16. The polarity detection circuit 33includes, for example, a third diode D3, a fourth diode D4, a firstphotocoupler PC1, a second photocoupler PC2, and a logic circuit 51.

In the third diode D3, the cathode is connected to the first terminalAC1 of the filter circuit 11 and the anode is connected to the cathodeof the first photocoupler PC1. In the first photocoupler PC1, the anodeis connected to the second terminal AC2 of the filter circuit 11 via aresistance, a collector is connected to GND, and an emitter is connectedto the logic circuit 51.

In the fourth diode D4, the anode is connected to the first terminal AC1of the filter circuit 11 and the cathode is connected to the anode ofthe second photocoupler PC2. The cathode of the second photocoupler PC2is connected to the second terminal AC of the filter circuit 11 via aresistance, a collector is connected to GND, and an emitter is connectedto the logic circuit 51.

According to such a configuration, when AC1<AC2, the first photocouplerPC1 causes a current to flow from the anode to the cathode to output asignal P1 to the logic circuit 51. When AC1>AC2, the second photocouplerPC2 causes a current to flow from the anode to the cathode to output asignal P2 to the logic circuit 51.

The logic circuit 51 is a circuit that outputs the signal ACP indicating“1” while the signal P2 is supplied from the second photocoupler PC2,and outputs the signal ACP indicating “0” while the signal P1 issupplied from the first photocoupler PC1. For example, the logic circuit51 includes one NAND and two ANDs. The signal P1 and the signal P2 areinput to the NAND. An output of the NAND and the signal P2 are input toa first AND. The output of the NAND and the signal P1 are input to asecond AND.

According to such a configuration, the first AND outputs “1” when thesignal P2 is input and the signal P1 is not input. The first AND outputs“0” when the signal P2 is not input and the signal P1 is input. That is,an output of the first AND is supplied to the selector 40 and thecurrent determiner 37 of the control circuit 16, as the signal ACP. Thesecond AND outputs “1” when the signal P2 is not input and the signal P1is input. The second AND outputs “0” when the signal P2 is input and thesignal P1 is not input. That is, an output of the second AND is theinverse of the signal ACP.

Other circuits of the control circuit 16 may also be implemented in alogic circuit or a combination of a processor and a program, instead ofan analog circuit.

For example, the first comparator 32 and the second comparator 38 may beconfigured to convert each of two input signals into a digital signal byusing AD conversion or the like and to calculate the difference indigital values. The first comparator 32 and the second comparator 38 areimplemented by, for example, the following code.

Sout = f(Sin1, Sin2) { Sout = Sin1 − Sin2; }

Also, the multiplier 36 may be configured to convert each of two inputsignals into a digital signal by using AD conversion or the like and toperform multiplication in digital values. The multiplier 36 isimplemented by, for example, the following code.

MUL = f(Sin1, Sin2) { MUL = Sin1 * Sin2; }

As described above, when implemented in a combination of a processor anda program, an input signal is converted into a digital signal by usingAD conversion or the like, and calculation is performed based on thedigital value. When a rear circuit is an analog circuit, a digitalsignal may be converted into an analog signal by using DA conversion orthe like and output as the converted analog signal.

In the above embodiment, it was described that the control circuit 16is, for example, an arithmetic IC such as a microcomputer or a digitalsignal processor. Accordingly, there is a restriction that the signal ISinput to the control circuit 16 is limited to a voltage between GND andVCC. That is, the control circuit 16 cannot handle a negative value ofthe signal IS.

However, for example, as shown in FIG. 9 , GND of the control circuit 16is a negative value (for example −5 [V]) instead of 0 V, that is, thecontrol circuit 16 is configured as an IC operating in a range of VCC(+5 [V]) to NVCC (−5 [V]). In this case, when the signal IS satisfiesNVCC<IS<VCC, the control circuit 16 can calculate an absolute value ofthe signal IS and control the pulse width of turning on or off the firsthalf-wave switch S1 and the second half-wave switch S2, based on thecalculated absolute value of the signal IS.

While certain embodiments have been described, these embodiments havebeen presented by way of example only, and are not intended to limit thescope of the inventions. Indeed, the novel embodiments described hereinmay be embodied in a variety of other forms; furthermore, variousomissions, substitutions and changes in the form of the embodimentsdescribed herein may be made without departing from the spirit of theinventions. The accompanying claims and their equivalents are intendedto cover such forms or modifications as would fall within the scope andspirit of the inventions.

What is claimed is:
 1. A power converting device, comprising: a totempole type power factor improving circuit comprising a coil connected toa first terminal of an AC power supply, a first half-wave switch inwhich a source terminal is connected to the coil via a first currentdetector which is a first resistance, a second half-wave switch in whicha drain terminal is connected to the coil via a second current detectorwhich is a second resistance, a first diode in which a cathode isconnected to a drain terminal of the first half-wave switch and an anodeis connected to a second terminal of the AC power supply, a second diodein which an anode is connected to a source terminal of the secondhalf-wave switch and a cathode is connected to the second terminal ofthe AC power supply, and a smoothing capacitor connected between thecathode of the first diode and the anode of the second diode; and acontrol circuit configured to control a pulse width to turn on or offthe first half-wave switch and the second half-wave switch based on atotal value of a result of detecting a DC voltage of the first currentdetector and a result of detecting a DC voltage of the second currentdetector, wherein a connection point between the first current detectorand the second current detector is connected to the coil, and aconnection point between the second current detector and the drainterminal of the second half-wave switch is a reference point.
 2. Thepower converting device of claim 1, wherein the control circuit obtainsthe result of detecting the DC voltage of the first current detector andthe result of detecting the DC voltage of the second current detectorwith reference to a GND voltage that is a voltage at the connectionpoint between the drain terminal of the second half-wave switch and thesecond current detector.
 3. The power converting device of claim 2,wherein the control circuit extracts, from the total value, a positivevalue with reference to the GND voltage as an extraction signal andcontrols the pulse width to turn on or off the first half-wave switchand the second half-wave switch based on the extraction signal.
 4. Thepower converting device of claim 3, wherein if there is no value of theextraction signal, the control circuit calculates an interpolationsignal via interpolation based on values of past extraction signals andcontrols the pulse width to turn on or off the first half-wave switchand the second half-wave switch based on the interpolation signal. 5.The power converting device of claim 3, further comprising: a polaritydetection circuit configured to detect the polarity of an AC voltagesupplied from the AC power supply, wherein the control circuit extractsthe extraction signal from the total value while the first terminal ofthe AC power supply is at a positive potential and the second half-waveswitch is turned on or while the second terminal of the AC power supplyis at a positive potential and the first half-wave switch is turned on,turns on the first half-wave switch while the first terminal of the ACpower supply is at a positive potential and the second half-wave switchis turned off, and turns on the second half-wave switch while the secondterminal of the AC power supply is at a positive potential and the firsthalf-wave switch is turned off.
 6. The power converting device of claim2, wherein the control circuit calculates an absolute value of a totalvalue based on the positive or negative of the total value withreference to the GND voltage and controls the pulse width to turn on oroff the first half-wave switch and the second half-wave switch based onthe absolute value.
 7. The power converting device of claim 2, whereinthe control circuit: converts a voltage across the smoothing capacitorinto a voltage with reference to the GND voltage that is the voltage atthe connection point between the drain terminal of the second half-waveswitch and the second current detector, and controls the pulse widthbased on the converted voltage.
 8. The power converting device accordingto claim 1 configured as an AC to DC converter for an image formingapparatus.
 9. The power converting device of claim 4, furthercomprising: a polarity detection circuit configured to detect thepolarity of an AC voltage supplied from the AC power supply, wherein thecontrol circuit extracts the extraction signal from the total valuewhile the first terminal of the AC power supply is at a positivepotential and the second half-wave switch is turned on or while thesecond terminal of the AC power supply is at a positive potential andthe first half-wave switch is turned on, turns on the first half-waveswitch while the first terminal of the AC power supply is at a positivepotential and the second half-wave switch is turned off, and turns onthe second half-wave switch while the second terminal of the AC powersupply is at a positive potential and the first half-wave switch isturned off.
 10. A power converting method in a totem pole type powerfactor improving circuit comprising a coil connected to a first terminalof an AC power supply, a first half-wave switch in which a sourceterminal is connected to the coil via a first current detector which isa first resistance, a second half-wave switch in which a drain terminalis connected to the coil via a second current detector which is a secondresistance, a first diode in which a cathode is connected to a drainterminal of the first half-wave switch and an anode is connected to asecond terminal of the AC power supply, a second diode in which an anodeis connected to a source terminal of the second half-wave switch and acathode is connected to the second terminal of the AC power supply, anda smoothing capacitor connected between the cathode of the first diodeand the anode of the second diode, wherein a connection point betweenthe first current detector and the second current detector is connectedto the coil, and a connection point between the second current detectorand the drain terminal of the second half-wave switch is a referencepoint, comprising: controlling a pulse width to turn on or off the firsthalf-wave switch and the second half-wave switch based on a total valueof a result of detecting a DC voltage of the first current detector anda result of detecting a DC voltage of the second current detector. 11.The power converting method of claim 10, further comprising: obtainingthe result of detecting the DC voltage of the first current detector andthe result of detecting the DC voltage of the second current detectorwith reference to a GND voltage that is a voltage at the connectionpoint between the drain terminal of the second half-wave switch and thesecond current detector.
 12. The power converting method of claim 11,further comprising: extracting, from the total value, a positive valuewith reference to the GND voltage as an extraction signal andcontrolling the pulse width to turn on or off the first half-wave switchand the second half-wave switch based on the extraction signal.
 13. Thepower converting method of claim 12, further comprising: if there is novalue of the extraction signal, calculating an interpolation signal viainterpolation based on values of past extraction signals and controllingthe pulse width to turn on or off the first half-wave switch and thesecond half-wave switch based on the interpolation signal.
 14. The powerconverting method of claim 12, further comprising: detecting thepolarity of an AC voltage supplied from the AC power supply; extractingthe extraction signal from the total value while the first terminal ofthe AC power supply is at a positive potential and the second half-waveswitch is turned on or while the second terminal of the AC power supplyis at a positive potential and the first half-wave switch is turned on;turning on the first half-wave switch while the first terminal of the ACpower supply is at a positive potential and the second half-wave switchis turned off; and turning on the second half-wave switch while thesecond terminal of the AC power supply is at a positive potential andthe first half-wave switch is turned off.
 15. The power convertingmethod of claim 11, further comprising: calculating an absolute value ofa total value based on the positive or negative of the total value withreference to the GND voltage and controls the pulse width to turn on oroff the first half-wave switch and the second half-wave switch based onthe absolute value.
 16. The power converting method of claim 11, furthercomprising: converting a voltage across the smoothing capacitor into avoltage with reference to the GND voltage that is the voltage at theconnection point between the drain terminal of the second half-waveswitch and the second current detector; and controlling the pulse widthbased on the converted voltage.
 17. The power converting method of claim13, further comprising: detecting the polarity of an AC voltage suppliedfrom the AC power supply; extracting the extraction signal from thetotal value while the first terminal of the AC power supply is at apositive potential and the second half-wave switch is turned on or whilethe second terminal of the AC power supply is at a positive potentialand the first half-wave switch is turned on; turning on the firsthalf-wave switch while the first terminal of the AC power supply is at apositive potential and the second half-wave switch is turned off; andturning on the second half-wave switch while the second terminal of theAC power supply is at a positive potential and the first half-waveswitch is turned off.